Binary Arithmetic Calculator: A 4 Bit Signed Design Using Schematic and Verilog

Authors

  • Monika Dixit Associate Professor, Dept. of ECE, Greater Noida Institute of Technology (Engg. Institute), Greater Noida, India. Author
  • S.M. Azhaan Mashir UG Scholar, Dept. of ECE, Greater Noida Institute of Technology (Engg. Institute), Greater Noida, India Author
  • Ananya Maurya UG Scholar, Dept. of ECE, Greater Noida Institute of Technology (Engg. Institute), Greater Noida, India Author
  • Shiv Kumar Jha UG Scholar, Dept. of ECE, Greater Noida Institute of Technology (Engg. Institute), Greater Noida, India Author

DOI:

https://doi.org/10.47392/IRJAEH.2025.0407

Keywords:

4-bit, Arithmetic operation, Xilinx design suite

Abstract

This article presents “An Integrated Approach: Design and Implementation of a 4-Bit Signed Binary Calculator for Arithmetic Operations using Schematic and Verilog”. Capable of performing essential arithmetic operations like addition, subtraction, multiplication, and division, this calculator has been meticulously crafted to cater specifically to the efficient computation needs of a 4-bit binary system. By integrating numerous arithmetic modules including an adder-subtractor unit, a multiplier, and a divider, this calculator achieves exceptional functionality and reliability. To maximize performance and minimize hardware complexity, the implementation of the calculator harnesses a combination of combinational and sequential logic design techniques. This strategic approach allows for rapid computation and facilitates seamless execution of arithmetic operations within the limitations of a 4-bit binary environment. I have used Xilinx Design suite 14.7 to design and simulate the Schematic and Verilog Design.

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Published

2025-06-04

How to Cite

Binary Arithmetic Calculator: A 4 Bit Signed Design Using Schematic and Verilog. (2025). International Research Journal on Advanced Engineering Hub (IRJAEH), 3(06), 2747-2755. https://doi.org/10.47392/IRJAEH.2025.0407

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