Design and Implementation of Verilog Based High Speed Low Power UART

Authors

  • Ms. Banti Kumari Noida Institute of Engineering and Technology, Greater Noida, India. Author
  • Ms. Kanika Jindal Noida Institute of Engineering and Technology, Greater Noida, India. Author
  • Mr. Amit Bindal Noida Institute of Engineering and Technology, Greater Noida, India. Author

DOI:

https://doi.org/10.47392/IRJAEH.2024.0203

Keywords:

Asynchronous, Receiver, Transmitter, RS-232C, UART

Abstract

The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.

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Published

2024-05-24

How to Cite

Design and Implementation of Verilog Based High Speed Low Power UART. (2024). International Research Journal on Advanced Engineering Hub (IRJAEH), 2(05), 1468-1477. https://doi.org/10.47392/IRJAEH.2024.0203

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