Low Power Adders for Efficient Image Processing Applications

Authors

  • L.Sowmiya M E VLSI Design, KPR Institute of Engineering and Technology, Coimbatore, India Author
  • Ramesh SM Department of ECE, KPR Institute of Engineering and Technology, Coimbatore, India Author
  • Arul A Department of ECE, KPR Institute of Engineering and Technology, Coimbatore, India Author
  • Kathirvelu M Department of ECE, KPR Institute of Engineering and Technology, Coimbatore, India Author

DOI:

https://doi.org/10.47392/IRJAEH.2023.003

Keywords:

Very Large-Scale Integration, approximation, adders, low power, efficiency, microprocessor, image processing.

Abstract

In the world of digitalization, low-power circuits are necessary for building fast operating processors. Additionally, low-power circuits consume less energy and the lifetime of the electronic devices can extended to the maximum. Adders are significantly used in digital image processing techniques and for many Very Large-Scale Integration (VLSI) applications. Due to this, demand for creating efficient adders has become high in recent years. Using approximate adders is much more convenient than exact adders and the results of approximation adders are better than exact adders. Approximation adders can be executed for many signal-processing applications and are mainly considered for image-processing applications. SESA and SEDA are very good in providing efficiently lower energy when compared to other mirror adder circuits and are cost-efficient. Improvements and further extensions of the proposed model can easily make for building efficient microprocessor chips and these adders are used in next-generation electronic devices.

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Published

2023-12-20

How to Cite

Low Power Adders for Efficient Image Processing Applications. (2023). International Research Journal on Advanced Engineering Hub (IRJAEH), 1(01), 19-23. https://doi.org/10.47392/IRJAEH.2023.003

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