Review of Switching Mechanism and Routing Algorithms for The Design of 1*3 Router Using Verilog

Abstract

A key idea in networking is routing, which is figuring out the best way for data to move between two or more computer network devices. The devices responsible for making these decisions are called routers. İt is a network device that connects different networks. İt works at 3rd layer Routers examine the destination address of incoming data packets and decide where to forward them based on routing tables. This paper offers a thorough review of various routing algorithm techniques and switching mechanism employed in computer networks and compare the results and find the best way to implement the 1*3 router Three output ports and one input port make up the router 1x3. Top-level architecture created in Verilog employing sub-modules such as FIFO, FSM, Synchronizer, and Register. Xilinx 14.5 is used to examine and verify the RTL design of routers. This research provides an extensive review of the latest technology in routing by combining traditional methods, modern approaches, and conventional algorithms.