Low-Power 12T SRAM with Improved Read Stability, Multi-Node Upset Recoverability and Soft-Error Mitigation for Aerospace Applications

Abstract

Transistor sizes are getting smaller as technology advances, which lowers the critical charge in SRAM cells used in aircraft. This increases their vulnerability to soft mistakes, in which radiation can cause SEUs by flipping stored data. We suggest the Soft-Error-Aware Read-Stability-Enhanced Low Power 12T (SARP12T) SRAM cell as a solution to this problem. When it comes to soft-error cells, SARP12T guarantees data recovery even in the face of radiation damage, including single-event multi-node upsets, in contrast to QUCCE12T and RSP14T. It has exceptional read stability and uses the least amount of hold power to recover from disruptions during read operations. Though it uses slightly more energy and has a little longer read latency, SARP12T excels in write capabilities and delay. Its advantages promise improved performance and dependability in crucial systems, extending to CPU and aircraft applications.