A Hybrid Yolo FPGA Architecture for Real-Time Object Detection in Edge Computing
DOI:
https://doi.org/10.47392/IRJAEH.2025.0042Keywords:
Hybrid YOLO, FPGA Architecture, Real-Time Object Detection, Edge Computing, Xilinx Vivado, Detection Rate, Power ConsumptionAbstract
Real-time object detection is a critical task in edge computing applications, where low latency and energy efficiency are paramount. This paper proposes a hybrid YOLO-based FPGA architecture optimized for real-time object detection at the edge. The architecture combines the computational efficiency of FPGA hardware accelerators with the flexibility of software-based post-processing to achieve a balance between performance and adaptability. The proposed system offloads compute-intensive convolutional layers to the FPGA fabric, leveraging parallel processing capabilities and hardware pipelining to accelerate inference time. Meanwhile, non-maximum suppression and post-processing tasks are handled by a lightweight software module, ensuring minimal overhead and dynamic model reconfiguration. Experimental results demonstrate that the hybrid architecture achieves significant improvements in inference speed and energy efficiency compared to CPU- and GPU-based implementations, making it suitable for edge devices with limited computational resources. This architecture presents a scalable and adaptable solution for real-time object detection in applications such as autonomous vehicles, surveillance systems, and smart IoT devices.
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